The present invention relates generally to low noise frequency synthesizers, and more particularly, to a low noise frequency synthesizer using half integer dividers and analog gain compensation.
Traditional methods of frequency synthesis utilize either direct analog or indirect M over N, or pulse swallowing techniques. For missile applications, the size and volume constraints in the missile are incompatible with the direct analog synthesizers due to the large number and physically large sizes of all the frequency multipliers and high Q bandpass filters needed therein. Synthesizers employing normal M over N or pulse swallowing suffer primarily from higher spurious levels, so the design must be done very carefully.
Gain compensation is normally done by using a finite number of analog switches to switch in different resistor combinations to vary the loop gain. The drawback with this is only a finite number of steps are available and the resolution of these limited number of steps is gross. In addition the parasitic capacitances of these extra components can cause stability problems.
Accordingly, it would be an advantage in the frequency synthesizer art to have a low noise frequency synthesizer that provides for lower phase noise, lower spurious levels and faster switching speed than traditional methods of frequency synthesis.